Switch controlled gating network



March 8, 1966 F. G. STEELE 3,239,637

SWITCH CONTROLLED GATING NETWORK Original Filed A ril 7, 1955 92 I026 r-A1- s 0 F )1 J mmvrox.

F2070 6. STEELE BY Whi Patented Mar. 8, 1966 3,239,687 SWITCH CONTROLLEDGATING NETWORK Floyd George Steele, La Joila, CaliL, assignor to DigitalControl Systems, Inc., La .lolla, Calif.

Continuation of application Ser. No. 602,260, Aug. 6,

1956, which is a division of application Ser. No.

499,779, Apr. 7, 1955, now Patent No. 2,933,248,

dated Apr. 19, 1960. This application Dec. 18, 1962,

Ser. No. 246,303

9 Claims. (Cl. 307-885) This application is a continuation ofapplication Serial No. 602,260 entitled Switch Controlled GatingNetwork," filed August 6, 1956, now abandoned, which is a division ofapplication Serial No. 499,779, now Patent No. 2,933,248, entitled HighSpeed Digital Control Systern, filed April 7, 1955, by the presentinventor. The specifications and drawings of this application areidentical to said abandoned application, Serial No. 602,260, the presentapplication differing therefrom only in the presence of additionalclaims.

The present invention relates to multiple-input switchcontrolled gatingnetworks and more particularly to a switch-controlled gating networkresponsive to a plurality of bilevel input signals, including at leastone bilevel input signal applied through a switch, for producing anoutput signal only when all of the input signals are at a predeterminedlevel and the switch is closed.

Although logical gating circuits such as and and or gates, as employedin modern digital computing machines, are for the most part responsiveonly to bilevel (high and low) voltage signals produced by extremelyhigh speed electronic devices, it is also important that the overallfunctioning of such gating circuits be modifiable in accordance with theopening or closing of switches controlled by the human operators of suchmachines. It is in this way that an operator is able to maintain generalsupervisory control over the operations of the machine.

It has been common, in the prior art, to utilize switches in which thepole of a switch was connected to high and low voltages respectively attwo positions of the switch, these high or low voltages thus beingcoupled to the pole of the switch, and from there being applied tosubsequent gating circuits to thereby afiect the operation of the gatingcircuits in accordance with the position of the switch.

For example, suppose that a bilevel output signal S were to be generatedin accordance with prior art methods, the signal S having a high levelonly when a bilevel signal A has a high level and a second bilevel inputsignal A has a high level and a two position switch Z is in apredetermined position. Restating this requirement in terms of a Booleanlogical equation, it is required that:

where the dots signify the performance of the logical and operation uponthe conditions joined thereby.

According to the methods ordinarily used in the prior art, the signal Smight be generated by utilizing a con ventional three input and gatewhich produces a high level output signal only when high level signalsare applied to all of the inputs of the gate. The signals A and A wouldbe applied respectively to two of the inputs of the and gate and thepole of the two position switch Z would be connected to the third inputof the and gate, the pole of switch Z making contact to a source of highlevel voltage when it is at its predetermined position and makingcontact to a source of low level voltage when it is at its otherposition. The output signal produced by the and gate will then be therequired signal S.

However it should be understood, that with such a mechanization, theant. gate must have as many inputs as there are input conditions. Thusin the present example, if a diode and" gate were utilized, it wouldemploy three diode rectifiers, one rectifier for each of the gateinputs. Since diode rectifiers are relatively expensive and of limitedreliability it is obviously desirable to reduce the number of dioderectifiers employed. It will be shown hereinafter that, in accordancewith the present invention, switch controls may be introduced withoutrequiring additional gate inputs, so that the introduction of suchswitches is made without additional cost in terms of diode rectifiers orother non-linear gating elements.

Another disadvantage of the type of prior art switchcontrolled gatingnetwork described above is that while the pole of the control switch istraversing between its two positions, an extremely high impedance opencircuit is presented to the corresponding input of the gating circuit.This high impedance open circuit may readily have undesired crosstalksignals induced in or capacitatively coupled thereto from adjacentcircuits, thereby destroying the operation of the gating circuit duringthe transitional period in which the switch traverses from one toanother of its positions. In contrast, in the practice. of the presentinvention a switch controlled input to a gating circuit is never openedbut is instead always maintained at a relatively low impedance level sothat crosstalk signals cannot be coupled thereto.

It is accordingly an object of the invention to provide a novel inputgating network for producing electrical output signals whenever aplurality of input conditions, expressible by closure of at least oneelectrical switch and the receipt of predetermined signals from aplurality of input signal sources, is satisfied.

It is another object of the invention to provide a switch controlledgating network responsive to a plurality of input signals, including atleast one bilevel signal applied through a switch, for producing anoutput signal only when all of the input signals are at a predeterminedlevel and the switch is closed.

The novel features which are believed to be characteristic of theinvention, both as to its organization and method of operation, togetherwith further objects and advantages thereof, will be better understoodfrom the following description considered in connection with theaccompanying drawings in which one embodiment of the invention isillustrated by way of example. It is to be expressly understood,however, that the drawings are for the purpose of illustration anddescription only, and are not intended as a definition of the limits ofthe invention.

FIG. 1 is a partly block, partly circuit diagram of a preferredembodiment of a switch-controlled gating network in accordance with thepresent invention;

FIG. 2 is a circuit diagram of one embodiment of a gating circuitutilized in the network shown in FIG. 1.

Referring now to the drawings wherein like or corresponding parts aredesignated by corresponding reference characters, there is shown in FIG.1 a partly block, partly circuit diagram of a preferred embodiment of aswitch controlled gating network in accordance with the presentinvention which is seen to include a two terminal and gate 1026 and a Zswitch designated 92. As shown in FIG. 1, a bilevel voltage signal A isapplied to one input of and gate 1026 while a second bilevel voltagesignal A is applied through switch 92 to a second input of and gate1026. In this way the source (not shown) of signal A is either connectedto or disconnected from the second input of and gate 1026 in accordancewith switch 92 being in its open or closed position. The logicalsignificance of this gating network is that a high level output signal Sis produced by gate 1026 only when signal A at its high level is appliedto gate 1026 and the Z switch is closed and the applied bilevel signal Ais at its high level. It will be recognized that combining these termsproduces the following logical equation which defines the output signalS:

It will be noted that the gating network for producing the signal S alsoincludes a resistor 1029 which is connected at one end to the secondinput of gate 1026 and at its other end to a terminal B of a source ofrelatively low potential (not shown). The purpose of this resistor is tomaintain the output conductor from switch 92 at a low voltage levelwhenever the switch is open in order to maintain an gate 1026 as a twoinput terminal and gate. In other words, if resistor 1029 were omittedgate 1026 would act as a one input terminal and gate whenever switch 92was opened, and consequently the signal A would be passed by gate 1026independently of the level of signal A It will be noted that, in thepractice of the present invention as described above, an and gate havingonly two inputs produces an output signal S which is an and function ofthree input conditions. What has been accomplished is that the conditionof the switch Z has been introduced without requiring an additional gateinput. Those skilled in the art will recognize, that in accordance withthe invention, switch control of and gates m-ay always be accomplishedin this manner without cost in terms of gate inputs. Since each input to an an gate ordinarily requires at least one rectifier? or othernonlinear element, it is clear that the number of components required(and hence cost and loss of reliability) may be considerably reduced byutilizing the switch controlled gating networks of the presentinvention.

In the above description of the invention, reference has been made to anand gate which, as is well-known to those skilled in the art, is acircuit including two or more inputs and a single output and responsiveto the voltage levels of two-level signals applied to its inputterminals for producing a high level voltage output signal only when allof the input signals are at their high level values. And gates mayutilize vacuumtubes, crystal rectifiers or other non-linear elements;The operation and structure of and gates is explained in numerouspublications, as for example in the article entitled How an ElectronicBrain Works by Berkely and Jensen found on page 45 of the September 1951issue of Radio Electronics Magazine, or in the article entitled AnAlgebraic Theory for Use in Digital Computer Design by Nelson, found onpage 12 of the September 1954 issue of the Transactions of the IREProfessional Group on Electronic Computers.

However forpurposes of convenient reference a circuit diagram of apreferred embodiment of an gate 1026 is shown in FIG. 2, this embodimentbeing a two input and gate mechanized with two diode rectifiers D and Dand a resistor R. As shown in FIG. 2 the cathodes of diodes D and Dserve as the respective inputs of the and gate and the anodes of therectifiers are connected to a common junction terminal E of a source ofa relatively high potential, not shown. In operation, as is wellknown inthe art, the signal S existing at the common junction terminal and onthe output conductor will be maintained at a level corresponding to thelowest voltage applied to the cathodes of diodes D and D since thecorresponding diode would then be biased in its conductive direction sothat the diode would thereby establish a short circuit between thecommon junction terminal and the source of low voltage. Thus the inputsignal S can have a high voltage level only when all of the appliedinput signals are at their high levels.

What is claimed as new is:

1. A multiple input gating network for producing an electrical outputsignal whenever a plurality of input conditions, expressible by theclosure of at least one electrical switch and the receipt of high levelinput signals from a plurality of input s g al ources, are Satisfied,Said gating circuit comprising: an an gate circuit having an outputterminal and n input terminals, said gating circuit being responsive tothe simultaneous application of high level input signals to all of saidit input terminals for producing a high level output signal; means forintercoupling the 1 (n-l) input terminal to a corresponding plurality oftwo-elevel input sign-a1 sources; a mechanical switch having an openposition and a closed position and at least a pair of terminals, saidpair of terminals being electrically interconnected when said switch isin its closed position and disconnected when said switch is in its openposition; means for interconnecting one of said pair of terminals ofsaid switch to the n input terminal of said an gate; impedance means forapplying a relatively low level voltage to said one terminal of saidpair of terminals; and means for interconnecting the other of said pairof terminals to a two-level input signal source whereby said gatingcircuit produces a high level output signal only when the input signalsfrom all of said input signal sources are at their high level value andsaid switch is closed.

2. The gating network defined in claim 1 wherein said impedance meansincludes a resistor of predetermined value and having first and secondends, said first end of said resistor being connected to said oneterminal of said switch, and means for applying a relatively low levelvoltage to said second end of said resistor.

3. A multiple input electronic network for producing an electricaloutput signal whenever a plurality of input conditions are satisfied,said gating network comprising: an and gate having an output terminaland at least two input terminals, said and gate being responsive to theapplication of two-level input signals to its input terminals forproducing an output signal each time the input signals received are attheir high level value; means for applying a first two-level inputsignal to one of the input terminals of said and gate; an electricalswitch having a pair of terminals and mechanical means for selectivelyclosing an electrical circuit between said pair of terminals; means forinterconnecting one of said pair of switch terminals to another inputterminal of said and gate; and means for applying a second two-levelinput signal to the other of said pair of switch terminals; a resistorhaving first and second terminals, said first terminal of said resistorbeing connected to said one switch terminal; and means for applying arelatively low level voltage to said second terminal of said resistorthereby to render said and gate inoperative whenever said switch isopen.

4. A multiple input gating network for producing an electrical outputsignal whenever a plurality of input con ditions, expressible by theclosure of at least one electrical switch and the receipt of high levelinput signals from a plurality of input signal sources are satisfied,said gating circuit comprising: an and gate circuit having an outputterminal, a plurality of n input terminals, and a respectivelycorresponding plurality of n non-linear resistive elements intercoupledbetween said input terminals and said output terminal, said gatingcircuit being responsive to the simultaneous application of high leveloutput signals to all of said n input terminals for producing a highlevel output signal; means for inter-coupling the 1 (n1) input terminalto a corresponding plurality of two-level input signal sources; amechanicafi switch having an open position and a closed position and atleast a pair of terminals, said pair of terminals being: electricallyinterconnected when said switch is in its closed. position anddisconnected when said switch is in its open: position; means forinterconnecting one of said pair of terminals of said switch to the ninput terminal of said and gate; impedance means for applying arelatively low level voltage to said one terminal of said pair ofterminals; and means for interconnecting the other of said pair ofterminals to a two-level input signal source whereby said gating circuitproduces a high level output signal only when the input signals from allof said input signal sources are at their high level value and saidswitch is closed.

5. The combination defined by claim 4 wherein each of said 12 non-linearresistive elements comprises a rectifier element.

6. The combination defined by claim 4 wherein said impedance means has aresistive impedance which is relatively high compared to the impedanceof the two-level input signal source connected to said other of saidpair of terminals, and relatively low compared to the impedance of saidand gate.

7. A multiple input electronic gating network for producing anelectrical output signal whenever a plurality of input conditions aresatisfied, said gating network comprising: an an gate having a pluralityof at least two input terminals and a respectively correspondingplurality of non-linear impedance elements, each of said non-linearimpedance elements being coupled to the corresponding input terminal foroperating upon input signals applied thereto, said and gate beingresponsive to the application of two-level input signals to its inputterminals for producing an output signal each time the input signalsreceived are at their high level value; means for applyin a firsttwo-level input signal to one of the input terminals of said and gate;an electrical switch having a pair of terminals and mechanical means forselectively closing an electrical circuit between said pair ofterminals; means for interconnecting one of said pair of switchterminals to another input terminal of said and gate; and means forapplying a second two-level input signal to the other of said pair ofswitch terminals; a resistor having first and second terminals, saidfirst terminal of said resistor being connected to said one switchterminal; and means for applying a relatively low level voltage to saidsecond terminal of said resistor thereby to render said and gateinoperative whenever said switch is open.

8. The combination defined by claim 7 wherein said non-linear impedanceelements are semiconductor rectifying elements.

9. The combination defined by claim 7 wherein said resistor has animpedance substantially larger than the impedance of the source of saidsecond two-level signal and substantially smaller than the inputimpedance of said and gate at said another input terminal of said andgate.

Proceedings of the IRE, May 1950, pp. 511514, vol. 38, issue 5.

ARTHUR GAUSS, Primary Examiner.

1. A MULTIPLE INPUT GATING NETWORK FOR PRODUCING AN ELECTRICAL OUTPUTSIGNAL WHENEVER A PLURALITY OF INPUT CONDITIONS, EXPRESSIBLE BY THECLOSURE OF AT LEAST ONE ELECTRICAL SWITCH AND THE RECEIPT OF HIGH LEVELINPUT SIGNALS FROM A PLURALITY OF INPUT SIGNAL SOURCES, ARE SATISFIED,SAID GATING CIRCUIT COMPRISING: AN "AND" GATE CIRCUIT HAVING AN OUTPUTTERMINAL AND N INPUT TERMINALS, SAID GATING CIRCUIT BEING RESPONSIVE TOTHE SIMULTANEOUS APPLICATION OF HIGH LEVEL INPUT SIGNALS TO ALL OF SAIDN INPUT TERMINALS FOR PRODUCING A HIGH LEVEL OUTPUT SIGNAL; MEANS FORINTERCOUPLING THE 1ST ... (N-1)TH INPUT TERMINAL TO A CORRESPONDINGPLURALITY OF TWO-LEVEL INPUT SIGNAL SOURCES; A MECHANICAL SWITCH HAVINGAN OPEN POSITION AND A CLOSED POSITION AND AT LEAST A PAIR OF TERMINALS,SAID PAIR OF TERMINALS BEING ELECTRICALLY INTERCONNECTED WHEN SAIDSWITCH IS IN ITS CLOSED POSITION AND DISCONNECTED WHEN SAID SWITCH IS INITS OPEN POSITION; MEANS FOR INTERCONNECTING ONE OF SAID PAIR OFTERMINALS OF SAID SWITCH TO THE NTH INPUT TERMINAL OF SAID "AND" GATE;IMPEDANCE MEANS FOR APPLYING A RELATIVELY LOW LEVEL VOLTAGE TO SAID ONETERMINAL OF SAID PAIR OF TERMINALS; AND MEANS FOR INTERCONNECTING THEOTHER OF SAID PAIR OF TERMINALS TO A TWO-LEVEL INPUT SIGNAL SOURCEWHEREBY SAID GATING CIRCUIT PRODUCES A HIGH LEVEL OUTPUT SIGNAL ONLYWHEN THE INPUT SIGNALS FROM ALL OF SAID INPUT SIGNAL SOURCES ARE ATTHEIR HIGH LEVEL VALUE AND SAID SWITCH IS CLOSED.